zhoujie
2cbd4a152d
- 新增性能监控模块(performance_monitor)，用于实时跟踪系统性能指标 - 添加串口调试输出功能，支持系统状态和性能统计的定期输出 - 实现双缓冲机制，提升ADC数据采集和存储的实时性 - 优化数据存储模块，支持校正后数据的存储和双缓冲管理 - 增强错误处理机制，完善中断回调函数和系统错误恢复 ♻️ refactor(ltc2508): 重构ADC驱动支持双缓冲 - 将ADC数据存储从单缓冲区重构为双缓冲区结构 - 新增缓冲区状态管理和自动切换机制 - 优化DMA传输完成回调，支持多缓冲区处理 - 提供缓冲区获取和释放的API接口 📝 docs(performance): 新增性能评估报告和使用指南 - 创建STM32F405性能评估报告，详细分析系统性能指标 - 编写双缓冲机制使用指南，说明实现原理和使用方法 - 添加LTC2508驱动使用示例代码 🐛 fix(dma): 调整DMA中断优先级 - 将DMA2_Stream7中断优先级从9调整为6，优化中断响应 - 更新STM32CubeMX配置文件中的中断优先级设置 🔧 chore(config): 优化系统配置和代码结构 - 添加串口调试输出控制开关和间隔配置 - 清理中断处理文件，移除重复的回调函数定义 - 增强错误处理函数，添加系统状态恢复机制
72 lines
2.2 KiB
C
72 lines
2.2 KiB
C
/* USER CODE BEGIN Header */
|
|
/**
|
|
******************************************************************************
|
|
* @file dma.c
|
|
* @brief This file provides code for the configuration
|
|
* of all the requested memory to memory DMA transfers.
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* Copyright (c) 2026 STMicroelectronics.
|
|
* All rights reserved.
|
|
*
|
|
* This software is licensed under terms that can be found in the LICENSE file
|
|
* in the root directory of this software component.
|
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
*
|
|
******************************************************************************
|
|
*/
|
|
/* USER CODE END Header */
|
|
|
|
/* Includes ------------------------------------------------------------------*/
|
|
#include "dma.h"
|
|
|
|
/* USER CODE BEGIN 0 */
|
|
|
|
/* USER CODE END 0 */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
/* Configure DMA */
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
/* USER CODE BEGIN 1 */
|
|
|
|
/* USER CODE END 1 */
|
|
|
|
/**
|
|
* Enable DMA controller clock
|
|
*/
|
|
void MX_DMA_Init(void)
|
|
{
|
|
|
|
/* DMA controller clock enable */
|
|
__HAL_RCC_DMA2_CLK_ENABLE();
|
|
__HAL_RCC_DMA1_CLK_ENABLE();
|
|
|
|
/* DMA interrupt init */
|
|
/* DMA1_Stream0_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 1, 0);
|
|
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
|
|
/* DMA1_Stream3_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 1, 0);
|
|
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
|
|
/* DMA2_Stream0_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 1, 0);
|
|
HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
|
|
/* DMA2_Stream3_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 3, 0);
|
|
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
|
|
/* DMA2_Stream6_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 3, 0);
|
|
HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
|
|
/* DMA2_Stream7_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 6, 0);
|
|
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
|
|
|
|
}
|
|
|
|
/* USER CODE BEGIN 2 */
|
|
|
|
/* USER CODE END 2 */
|
|
|