zhoujie
2cbd4a152d
- 新增性能监控模块(performance_monitor)，用于实时跟踪系统性能指标 - 添加串口调试输出功能，支持系统状态和性能统计的定期输出 - 实现双缓冲机制，提升ADC数据采集和存储的实时性 - 优化数据存储模块，支持校正后数据的存储和双缓冲管理 - 增强错误处理机制，完善中断回调函数和系统错误恢复 ♻️ refactor(ltc2508): 重构ADC驱动支持双缓冲 - 将ADC数据存储从单缓冲区重构为双缓冲区结构 - 新增缓冲区状态管理和自动切换机制 - 优化DMA传输完成回调，支持多缓冲区处理 - 提供缓冲区获取和释放的API接口 📝 docs(performance): 新增性能评估报告和使用指南 - 创建STM32F405性能评估报告，详细分析系统性能指标 - 编写双缓冲机制使用指南，说明实现原理和使用方法 - 添加LTC2508驱动使用示例代码 🐛 fix(dma): 调整DMA中断优先级 - 将DMA2_Stream7中断优先级从9调整为6，优化中断响应 - 更新STM32CubeMX配置文件中的中断优先级设置 🔧 chore(config): 优化系统配置和代码结构 - 添加串口调试输出控制开关和间隔配置 - 清理中断处理文件，移除重复的回调函数定义 - 增强错误处理函数，添加系统状态恢复机制
327 lines
8.0 KiB
C
327 lines
8.0 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32f4xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "ltc2508_driver.h"
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#include "rs485_driver.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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extern DMA_HandleTypeDef hdma_sdio_rx;
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extern DMA_HandleTypeDef hdma_sdio_tx;
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extern DMA_HandleTypeDef hdma_spi1_rx;
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extern DMA_HandleTypeDef hdma_spi2_rx;
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extern DMA_HandleTypeDef hdma_spi3_rx;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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/* USER CODE BEGIN EV */
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extern SPI_HandleTypeDef hspi1;
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extern SPI_HandleTypeDef hspi2;
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extern SPI_HandleTypeDef hspi3;
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extern UART_HandleTypeDef huart1;
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn 0 */
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/* USER CODE END SVCall_IRQn 0 */
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/* USER CODE BEGIN SVCall_IRQn 1 */
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/* USER CODE END SVCall_IRQn 1 */
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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/* USER CODE BEGIN SysTick_IRQn 1 */
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32F4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles EXTI line1 interrupt.
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*/
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void EXTI1_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI1_IRQn 0 */
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/* USER CODE END EXTI1_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(ADC_DRY_Pin);
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/* USER CODE BEGIN EXTI1_IRQn 1 */
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/* USER CODE END EXTI1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream0 global interrupt.
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*/
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void DMA1_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
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/* USER CODE END DMA1_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi3_rx);
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/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
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/* USER CODE END DMA1_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream3 global interrupt.
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*/
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void DMA1_Stream3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
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/* USER CODE END DMA1_Stream3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi2_rx);
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/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
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/* USER CODE END DMA1_Stream3_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream0 global interrupt.
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*/
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void DMA2_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
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/* USER CODE END DMA2_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi1_rx);
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/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
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/* USER CODE END DMA2_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream3 global interrupt.
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*/
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void DMA2_Stream3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
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/* USER CODE END DMA2_Stream3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_sdio_rx);
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/* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
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/* USER CODE END DMA2_Stream3_IRQn 1 */
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}
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/**
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* @brief This function handles USB On The Go FS global interrupt.
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*/
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void OTG_FS_IRQHandler(void)
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{
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/* USER CODE BEGIN OTG_FS_IRQn 0 */
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/* USER CODE END OTG_FS_IRQn 0 */
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HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
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/* USER CODE BEGIN OTG_FS_IRQn 1 */
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/* USER CODE END OTG_FS_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream6 global interrupt.
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*/
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void DMA2_Stream6_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
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/* USER CODE END DMA2_Stream6_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_sdio_tx);
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/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
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/* USER CODE END DMA2_Stream6_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream7 global interrupt.
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*/
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void DMA2_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
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/* USER CODE END DMA2_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_tx);
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/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
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/* USER CODE END DMA2_Stream7_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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