This commit is contained in:
2026-03-14 09:39:29 +08:00
parent 644b04926d
commit 15a56a96c3
3 changed files with 208 additions and 18 deletions
+2 -15
View File
@@ -11,8 +11,6 @@
*******************************************************************************/
#include "eth_driver.h"
#include "ch32v30x_it.h"
#include "FreeRTOS.h"
#include "task.h"
void NMI_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
@@ -91,19 +89,8 @@ void ETH_IRQHandler(void)
*/
void TIM2_IRQHandler(void)
{
static uint8_t wchnet_divider = 0;
/* 2ms tick for FreeRTOS (configTICK_RATE_HZ = 500) */
sys_tick_ms += 2;
xPortSysTickHandler();
/* Software divider: call WCHNET_TimeIsr every 5 ticks = 10ms */
if (++wchnet_divider >= 5)
{
wchnet_divider = 0;
WCHNET_TimeIsr(WCHNETTIMERPERIOD);
}
sys_tick_ms += WCHNETTIMERPERIOD;
WCHNET_TimeIsr(WCHNETTIMERPERIOD);
TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
}
+38 -2
View File
@@ -75,6 +75,41 @@ void OnDetectionResult(uint32_t frameNumber, uint8_t resultStatus)
#define KEEPALIVE_ENABLE 1
/* ============================================================
* FLASH / SRAM 分配配置 (Option Bytes RAM_CODE_MOD[2:0])
* 修改后需复位才生效
* ============================================================ */
typedef enum {
FLASH_192_SRAM_128 = 0, /* 00x 默认 */
FLASH_224_SRAM_96, /* 01x */
FLASH_256_SRAM_64, /* 10x */
FLASH_128_SRAM_192, /* 110 */
FLASH_288_SRAM_32 /* 111 */
} FLASH_SRAM_DEFIN;
static void Config_Flash_SRAM(FLASH_SRAM_DEFIN mode)
{
uint8_t UserByte = FLASH_GetUserOptionByte() & 0xFF;
uint8_t newByte = UserByte & ~0xE0; /* clear bits [7:5] */
switch (mode) {
case FLASH_192_SRAM_128: break; /* 000 */
case FLASH_224_SRAM_96: newByte |= 0x40; break; /* 010 */
case FLASH_256_SRAM_64: newByte |= 0x80; break; /* 100 */
case FLASH_128_SRAM_192: newByte |= 0xC0; break; /* 110 */
case FLASH_288_SRAM_32: newByte |= 0xE0; break; /* 111 */
default: return;
}
if (newByte == UserByte) return; /* already configured */
FLASH_Unlock();
FLASH_ProgramOptionByteData(0x1FFFF802, newByte);
FLASH_Lock();
printf("Flash/SRAM config changed to %d, resetting...\r\n", mode);
NVIC_SystemReset();
}
u8 MACAddr[6];
u8 IPAddr[4] = {192, 168, 1, 10};
u8 GWIPAddr[4] = {192, 168, 1, 1};
@@ -96,8 +131,7 @@ void TIM2_Init(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure = {0};
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
/* 2ms period: matches configTICK_RATE_HZ = 500 */
TIM_TimeBaseStructure.TIM_Period = 2000 - 1;
TIM_TimeBaseStructure.TIM_Period = WCHNETTIMERPERIOD * 1000 - 1;
TIM_TimeBaseStructure.TIM_Prescaler = SystemCoreClock / 1000000 - 1;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
@@ -226,6 +260,8 @@ int main(void)
Delay_Init();
USART_Printf_Init(115200);
printf("TCPClient Test\r\nSystemClk:%d\r\n", SystemCoreClock);
printf("UserByte: %02x\r\n", FLASH_GetUserOptionByte() & 0xFF);
Config_Flash_SRAM(FLASH_128_SRAM_192);
printf("net version:%x\n", WCHNET_GetVer());
if (WCHNET_LIB_VER != WCHNET_GetVer()) printf("version error.\n");