zhoujie
82d672a2d3
- 在 openspec/changes/archive/ 下新增 2026-03-13-check-dvp-dma-ir 归档目录
- 新增设计文档 (design.md)，包含背景、目标、决策和风险评估
- 新增提案文档 (proposal.md)，说明变更原因、内容和影响
- 新增功能规范 (spec.md)，定义 DVP 配置验证、DMA 内存传输正确性和诊断输出要求
- 新增任务清单 (tasks.md)，列出代码审查、中断处理和诊断验证的具体步骤
- 更新 openspec/config.yaml，添加上下文注释
- 在 openspec/specs/ 下新增 dvp-dma-ir-capture 功能规范
🐛 fix(dvp): 修复 DVP 任务中的竞态条件并增强调试输出
- 在 DVP_Task() 中访问 Line_Ready_Flag 和 Ready_Line_Ptr 前禁用 DVP 中断，操作后重新启用，防止数据竞争
- 增强第0行的调试打印，每秒计算并输出帧率 (fps)
- 新增打印第0行前8个字节的原始数据，用于验证数据有效性
- 使用外部定义的 sys_tick_ms 进行时间计算，确保时间基准一致
115 lines
4.0 KiB
C
115 lines
4.0 KiB
C
#include "dvp.h"
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#include "ch32v30x_dvp.h"
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#include "eth_driver.h"
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#include "string.h"
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__attribute__((aligned(4))) uint8_t DMA_LineBuf0[BYTES_PER_LINE];
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__attribute__((aligned(4))) uint8_t DMA_LineBuf1[BYTES_PER_LINE];
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volatile uint8_t Line_Ready_Flag = 0;
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volatile uint8_t *Ready_Line_Ptr = NULL;
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volatile uint32_t current_line_idx = 0;
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static uint32_t frame_count = 0;
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extern u8 socket[];
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extern volatile uint32_t sys_tick_ms;
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void DVP_Init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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NVIC_InitTypeDef NVIC_InitStructure = {0};
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DVP, ENABLE);
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_9 | GPIO_Pin_10;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_11;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_8 | GPIO_Pin_9;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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NVIC_InitStructure.NVIC_IRQChannel = DVP_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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DVP_Cfg(DVP_DMA_Disable, DVP_FLAG_FIFO_RESET_Enable, DVP_RX_RESET_Enable);
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DVP_Mode(RB_DVP_D8_MOD, Video_Mode);
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DVP->CR0 &= ~(RB_DVP_P_POLAR | RB_DVP_V_POLAR | RB_DVP_H_POLAR);
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DVP->DMA_BUF0 = (uint32_t)DMA_LineBuf0;
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DVP->DMA_BUF1 = (uint32_t)DMA_LineBuf1;
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DVP->ROW_NUM = 1;
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DVP->COL_NUM = BYTES_PER_LINE;
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DVP_INTCfg(ENABLE, RB_DVP_IE_STR_FRM | RB_DVP_IE_ROW_DONE);
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DVP_Cfg(DVP_DMA_Enable, DVP_FLAG_FIFO_RESET_Disable, DVP_RX_RESET_Disable);
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DVP->CR0 |= RB_DVP_ENABLE;
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}
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void DVP_Task(void)
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{
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if (!Line_Ready_Flag) return;
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NVIC_DisableIRQ(DVP_IRQn);
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uint8_t *line = (uint8_t *)Ready_Line_Ptr;
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uint32_t idx = current_line_idx;
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Line_Ready_Flag = 0;
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NVIC_EnableIRQ(DVP_IRQn);
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/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD> socket <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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if (idx < SENSOR_HEIGHT && socket[0] != 0xFF)
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{
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/* 4<>ֽ<EFBFBD><D6BD><EFBFBD>ͷ<EFBFBD><CDB7>֡<EFBFBD><D6A1>(2B) + <20>к<EFBFBD>(2B) */
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uint8_t hdr[4] = {
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(frame_count >> 8) & 0xFF, frame_count & 0xFF,
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(idx >> 8) & 0xFF, idx & 0xFF
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};
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u32 len = 4;
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WCHNET_SocketSend(socket[0], hdr, &len);
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len = BYTES_PER_LINE;
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WCHNET_SocketSend(socket[0], line, &len);
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/* ÿ֡<C3BF><D6A1>0<EFBFBD>д<EFBFBD>ӡһ<D3A1>Σ<EFBFBD>ȷ<EFBFBD><C8B7>֡<EFBFBD>ʡ<EFBFBD>֡<EFBFBD>ź<EFBFBD>socket״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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if (idx == 0) {
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static uint32_t last_fps_tick = 0;
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static uint32_t last_frame_count = 0;
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uint32_t now = sys_tick_ms;
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if (now - last_fps_tick >= 1000) {
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uint32_t fps = frame_count - last_frame_count;
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printf("[DVP] frame=%lu fps=%lu socket=%d tick=%lu\r\n", frame_count, fps, socket[0], now);
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printf(" Row0 Data: %02X %02X %02X %02X %02X %02X %02X %02X\r\n",
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line[0], line[1], line[2], line[3], line[4], line[5], line[6], line[7]);
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last_fps_tick = now;
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last_frame_count = frame_count;
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}
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}
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}
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else if (idx == 0 && socket[0] == 0xFF)
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{
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/* socket δ<><CEB4><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ʾ */
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printf("[DVP] frame=%lu waiting for TCP...\r\n", frame_count);
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}
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memset(line, 0, BYTES_PER_LINE);
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}
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void DVP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void DVP_IRQHandler(void)
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{
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if (DVP->IFR & RB_DVP_IF_STR_FRM)
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{
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DVP->IFR = RB_DVP_IF_STR_FRM;
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current_line_idx = 0;
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frame_count++;
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}
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if (DVP->IFR & RB_DVP_IF_ROW_DONE)
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{
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DVP->IFR = RB_DVP_IF_ROW_DONE;
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Ready_Line_Ptr = (DVP->CR1 & RB_DVP_BUF_TOG) ? DMA_LineBuf0 : DMA_LineBuf1;
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current_line_idx++;
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Line_Ready_Flag = 1;
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}
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}
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